About me
I am a Ph.D. student studying AI Accelerators and VLSI. I have been working in See Lab at UCSD CSE since Fall 2021.
I have taped-out two chips using TSMC CLN40LP (40 nm). The first chip is a hyper-dimensional computing (HDC) accelerator with a CNN feature extractor, capable of online few-shot learning. I am currently working on its post-silicon testing. The second chip replaces the HDC part with an in-ReRAM computing unit, which will come back from TSMC in Winter 2024.
Here is my CV.
Professional Experience
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GPU Architecture Intern, Qualcomm (Summer 2023)
Developed a visualizer for Ray-tracing acceleration structure.